View & download of more than 11109 Motorola PDF user manuals, service manuals, operating guides. Cell Phone, Two-Way Radio user manuals, operating guides & specifications. . IA-32 example: movl (%eax),%ecx!. EAX register stores a 32-bit address (e.g., 2000)!. Read long-word variable stored at that address!. Load the value into the ECX register!. Useful when address is not known in advance!. Dynamically allocated data referenced by a pointer! Feb 28, 2015 MotorolaEndUserDriverInstallation6.4.032bit.zip. 2.8 MB Views: 24,634. Windows 8.1 Pro 64 bit USA, English. Sdshadow Recognized Contributor. As you know, the 68000 has a 32 bit Program Counter and 32 bit address registers. This is so because addresses of locations in memory are 32 bit numbers, and consequently you can address up to 2 32 locations, i.e. 2 32 bytes, or 4 gigabytes (each memory location is one byte). In order to do so, you need a 32 bit address bus to carry a 32 bit address number from the CPU to memory and vice versa.

Lecture 9

LEARNING GOALS:

1.Learn what are the Motorola 68000 user registers.

2.Learn how the 68000 memory space is organized.

3. Familiarize yourself with the fundamentals of 68000 assembly language programming.

TABLE OF CONTENTS

9.1 THE 68000's SET OF REGISTERS

9.2 THE MEMORY SPACE OF THE 68000 PROCESSOR

9.3 ELEMENTARY PROGRAMMING IN 68000 LANGUAGE

9.3.1 Some basic 68000 instructions

9.3.2The size of an operation

9.3.3 Some Assembler Directives

9.3.4 A complete 68000 program

9.1 THE 68000's SET OF REGISTERS

The Motorola 68000 processor has 18 registers that are directly accessible by the user. Those are:

8 general-purpose data registers numbered from D0 to D7
8 address registers numbered from A0 to A7
1 Program Counter (the PC)
1 Status Register (the SR), which is divided in 2 parts: the System Byte, which we'll consider in later lectures, and the Condition Code Register (the CCR).

Figure 9.1
The 68000 User Registers

Here are the important points you should know about the 68000 user registers:

All the data registers, all the address registers and the Program Counter are 32-bits (4 bytes) wide.

The Status Register, or SR, is 16 bits (2 bytes) wide. Only the low-order byte of the SR, which is called the CCR, or Condition Code Register, can be accessed by the user. The high-order byte of the SR, the so-called System Byte, can be seen and accessed only by the Operating System during special emergency cases called interrupts and exceptions which will be discussed in the second part of the course. Until then, we can forget about the System Byte and work only with the CCR.

The data registers are used to store any data. They are general-purpose registers, because they haven't been reserved for any specific task by the 68000 chip designers, and they are interchangeable, in the sense that whatever you can do with register D_i you can also do with register D_j. There are some rare instructions that require a specific register as an operand, but those are really special cases and we won't see many of them.

The address registers are used to store addresses of locations in main memory. In other words, address registers are pointers to locations in memory. Registers A0 to A6 are general-purpose and interchangeable, just like their cousins the data registers. Register A7, also referred to as SP, is more special: it is the processor's stack pointer. It is used by the system to maintain a stack of subroutine return addresses (to be discussed later). You are free to access and modify the contents of register of A7, just like any other address register, but you always have to bear in mind what A7 is used for. Note that any address register can be used to maintain a stack. Thus, it is possible to handle several stacks at the same time. Note also that although you can store an address of a memory location in a data register, you cannot use a data register as a pointer to that location. The differences between address and data registers will become more clear when we start looking at the instructions that use those registers.

As we've already mentioned, the Program Counter is a register used to store the address in main memory of the next instruction to be executed. It is 32 bits wide, because memory addresses in the 68000 system are 32-bit numbers. The contents of the PC are automatically updated as each instruction is fetched and executed. The contents of the PC are always an even number, because an instruction can begin only at an even address. The user has a more restricted access to the PC than to a data or address register. We'll see later how the PC can be put to use in a program.

Bytes, words, longwords and bit numbering

As we said, most of the 68000 user registers are 32 bits wide, i.e. they can accommodate 32 bit numbers. In order to be able to reference a particular bit in the register, each bit is given a number. The convention is to number the bits from 0 to 31, bit 0 being the least significant, i.e. the rightmost bit, and bit 31 being the most significant, i.e. the leftmost bit. In other words, the bit numbering starts at 0 at the right end and goes from right to left in increasing order (see figure 8.2).

This numbering system is called little-endian (pronounce Little Indian) numbering, because if you read the bit numbers from right to left you have a little number at the end. The opposite system, called big-endian (pronounce Big Indian), consists in starting the numbering at 0 at the most significant (i.e. leftmost) bit and go in increasing order to the right, until the rightmost bit receives number 31 (you have a big number at the right end). There is nothing wrong with this numbering system, but the Motorola chip designers decided to go with the little-endian system, because it is more logical and more convenient to use.

Registers have the potential to accommodate 32 bit numbers (one longword), but they don't limit the user to perform operations only on 32 bit numbers. In fact, the programmer can work with either

the entire register size, i.e. a longword (bits 0 through 31), or
only the least significant word (bits 0 through 15), or
only the least significant byte (bits 0 through 7), in the case of data registers only.

Figure 9.2

The CCR

Let's now look in more detail at the CCR. The CCR is a very important piece of hardware because it allows conditional behavior (i.e. high level constructs of the kind if X then Y; else Z;) to be implemented, and the Control Unit often bases its decisions on the contents of the CCR.

Here is the basic setup of the CCR:

Figure 9.3
The CCR

The CCR is an 8 bit register, but only bits 0 to 4 are actually used. Bits 5, 6 and 7 are always ignored, and their value doesn't matter. It may be assumed that they are always set to 0. Bits 0 to 4 are flags, each of whom is affected in specific ways by the various operations performed by the CPU. Almost every instruction that is executed by the CPU forces an update on the value of one or more CCR bits.

Here is the function of each of the five CCR flags, or bits:

Bit 0, known as the C bit, is the carry bit. It is set (to 1) whenever the result of an operation generates a carry coming from the most significant bit of the result, and cleared (set to 0) otherwise.
Bit 1, known as the V bit, is the overflow bit. It is set if an operation results in arithmetic overflow in terms of two's complement arithmetic, i.e. when the result of an operation is too large or too small to be handled by the destination operand.
Bit 2, known as the Z bit, is the zero bit. It is set when the result of an operation is zero (i.e. all the bits of the result are 0), and is cleared otherwise.
Bit 3, known as the N bit, is the negative bit. It is set when the result of an operation is negative, and cleared when the result is positive. In other words, the N bit holds the value of the most significant bit of the result of the operation (remember two's complement numbers).
Bit 4, known as the X bit, is the extend bit. It often has the sam

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